HOME
RESEARCH
HETERO-X ON Si
SCALED MEMS/NEMS
NANO-ELECTRONIC MATERIALS
NANOSTUDIO 3D
FUSION
IN-SITU
SOLAR CELL
NANOSCALE STRAINS IN SI CMOS
STRAINED-Si CMOS
EXPERIMENTAL PROCEDURE
SAMPLES PREPARATION BY FIB
ZONE AXIS
CBED PATTERN SIMULATION
ANALYSIS
Si PMOS with SiGe in S/D
ONE-DIMENSIONAL STRAIN MAP
Si NMOS with SiN CAPPING
STI w/wo TRENCH FILLING
PROCESS-INDUCED STRAIN
STRAIN RELAXATION in Si(1-x)Ge(x)/Si
PERSONNEL
LABORATORY
NEWS
PUBLICATIONS
2010
2009
2008
2007
2006
2005
2004
2003
2002
2001
2000
1900s
ABOUT
CONTACT
STRAINED-Si CMOS CHARACTERIZATION TECHNOLOGY
Strained-Si Technology with Questions
Direct Strain Measurement Metrology